A 0.42-nanometer breakthrough could push transistors beyond silicon

Researchers at National Yang Ming Chiao Tung University and TSMC Corporate Research have engineered an ultrathin atomic interface layer enabling a 0.42-nanometer gate dielectric on monolayer MoS2 transistors, improving electrostatic control and carrier mobility for wafer-scale fabrication.

This Wire brief sits within Fusion42's coverage of Semiconductors.