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Why is everyone eyeing 3D DRAM?

Published

28 September 2026

Topic

opportunities

◆ Sectors

SemiconductorsAI Infrastructure

◆ Source

Read at eu.36kr.com →

◆ Verified

Fusion42 · 28 September 2026 · Fusion42 review

Multiple semiconductor companies are adopting 3D stacked DRAM technology in AI inference accelerators to achieve high performance, lower power consumption, and deterministic access. d-Matrix's Raptor accelerator showcases this with a chiplet design stacking DRAM on compute chips, achieving over 100 TB/s bandwidth and much higher capacity than SRAM-based accelerators.

This Wire brief sits within Fusion42's coverage of Semiconductors and AI Infrastructure.

◆ ◆ The Wire takeaway

AI chip founders must plan to integrate 3D stacked DRAM to compete on performance and power efficiency as this design shifts away from shared HBM towards dedicated memory per tensor core. Lower-frequency high-lane-count interfaces reduce design complexity and open new hardware design opportunities.

◆ Coverage

1 source · 28 Sep 2026

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◆ Topics

SemiconductorsAI Infrastructure3d-dramai-acceleratorsmemory-architecturepower-efficiencychiplet-design