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Long Live the Short King: Why 4-hi HBM Wins

Published

13 September 2026

Topic

opportunities

Sectors

Semiconductors

Geography

United States

Source

Read at newsletter.semianalysis.com

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Fusion42 · 13 September 2026 · Fusion42 review

The trend of increasing High Bandwidth Memory (HBM) stack heights in AI accelerators is reversing, with major players like Nvidia shifting from 12-hi to 8-hi and even 4-hi stacks to optimize costs and wafer usage while meeting performance needs. This shift responds to both supply constraints and workload efficiency, highlighting that lower HBM capacity can still deliver optimal token processing per watt and wafer, impacting AI chip design economics.

This Wire brief sits within Fusion42's coverage of Semiconductors.

◆ The Wire takeaway

You need to rethink HBM stack height in your AI accelerator designs now that 4-hi HBM offers the best cost efficiency per token and eases wafer supply pressures. This shift opens a window to reduce costs without sacrificing bandwidth, reshaping your memory architecture approach and supplier negotiations.

Coverage

1 source · 13 Sep 2026

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Semiconductorshigh-bandwidth-memoryHBMAI-acceleratorschip-designNvidiamemory-supply