← Back

Wire · technology

SMIC's 7nm win has strings attached

Published

21 July 2026

Topic

technology

Sectors

Semiconductors

Geography

China

Source

Read at fudzilla.com

Verified

Fusion42 · 21 July 2026 · Fusion42 review

SMIC has achieved 7nm-class density on its N+3 process using multi-patterning and design tricks, demonstrated in Huawei's Kirin 9030, but the chip suffers severe power and performance penalties compared to TSMC and Apple's designs. The breakthrough in area density masks fundamental limitations in power efficiency, performance-per-watt, and manufacturing yield that widen as competitors move to 2nm.

This Wire brief sits within Fusion42's coverage of Semiconductors.

◆ The Wire takeaway

If you're selling power delivery, thermal management or chiplet-integration IP to Chinese chip makers, SMIC's density-first strategy just became your route in: they cannot match TSMC's power efficiency head-on, so they're stacking die and wringing every joule from DUV, and that needs your help. The gap only widens as TSMC ships 2nm, so the window to lock in a customer before they have no choice is now.

Coverage

1 source · 21 Jul 2026

Related on Wire

Topics

Semiconductorssmic-process-techhuawei-kirinduv-multi-patterningsemiconductor-sanctionspower-efficiency-gap