Samsung Electronics achieves 'full capping' design in 400-layer NAND chip

Samsung Electronics has developed the V10 BV-NAND, a 10th-generation 3D NAND chip with over 400 layers, achieving a 58% increase in bit density, 33% faster I/O speeds, and 25% lower power consumption. The chip targets the growing demand for high-capacity, high-performance storage in AI data centers using innovative 'full capping' design, HARC etching, and wafer bonding technologies.

This Wire brief sits within Fusion42's coverage of Semiconductors.