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Wire · opportunities

TIER IV joins JST's Next-Generation Edge AI Semiconductor R&D Program to open ...

14 August 2026 · By · Wire by Fusion42

Published

14 August 2026

Topic

opportunities

◆ Sectors

AI & ML

◆ Geography

Japan

◆ Source

Read at taiwannews.com.tw →

◆ Verified

Fusion42 · 14 August 2026 · Fusion42 review

TIER IV has joined Japan Science and Technology Agency's Next-Generation Edge AI Semiconductor R&D Program to develop and open-source an AI chip design for Level 4 autonomous driving, enhancing power efficiency, adaptability, transparency, and verifiability in AI inference processing.

This Wire brief sits within Fusion42's coverage of AI & ML, and 3 sources have reported it between 13 Aug 2026 and 14 Aug 2026.

◆ ◆ The Wire takeaway

You must rethink chip integration for autonomous driving now that TIER IV is open-sourcing AI chip designs paired with toolchains, unlocking customisable hardware-software stacks beyond closed semiconductor products.

◆ Coverage

3 sources · first reported 13 Aug 2026 · latest 14 Aug 2026

◆ Related on Wire

◆ Topics

AI & MLopen-sourceai-chipautonomous-drivingedge-aisoftware-defined-soc